功率VDMOS器件键合失效分析与研究
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1北京微电子技术研究所,北京 100076;2清华大学机械工程系,北京 100084

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TN405.96

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Analysis and Research on Bonding Failure of Power VDMOS Devices
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1Beijing Microelectronics Technology Institution,Beijing 100076;2Department of Mechanical Engineering,Tsinghua University,Beijing 100084

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    摘要:

    功率VDMOS在航天领域各类二次电源系统中已得到广泛应用,但其在键合过程中会出现芯片端机械损伤的问题。以功率VDMOS器件为研究对象,发现键合失效是由于键合过程焊盘受到不同程度的机械作用而产生的损伤。影响机械损伤的主要因素包括芯片结构、键合材料、键合参数。结果表明:按键合损伤程度由轻到重划分,可分为多晶硅损伤、裂纹、弹坑。焊盘表面的Al层对键合机械作用起缓冲作用,其厚度由4 μm增加至6 μm可有效降低损伤程度。显微组织分析与仿真结果显示键合损伤出现在键合点两端,调整下移量与振幅可改变键合界面应力分布。降低键合压力和超声功率,可避免应力集中导致的键合损伤。

    Abstract:

    Power VDMOS was widely used in various secondary power supply systems in aerospace field.However,the mechanical damage of chip existed in bonding process.Taking power VDMOS devices as the research object,it was clear that bonding failure was the damage caused by different degrees of mechanical action,the main factors of mechanical damage are chip structure,bonding material and bonding parameters.The results show that the damage degree can be divided into polysilicon damage,crack and crater from light to severe.The Al layer cushioned,and its thickness increases from 4 μm to 6 μm,which can reduce the damage degree.Microstructure analysis and simulation show that the damage occurs at both ends of the bonding point,the stress distribution of the bonding interface can be changed by adjusting the downward movement and amplitude.Reducing the bonding pressure and ultrasonic power can avoid bonding damage caused by stress concentration.

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王潮洋,戴晨毅,林鹏荣,贾元希,葛一铭.功率VDMOS器件键合失效分析与研究[J].宇航材料工艺,2026,56(2):63-69.

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  • 收稿日期:2024-04-21
  • 最后修改日期:2026-03-23
  • 录用日期:2024-07-04
  • 在线发布日期: 2026-05-07
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